View ICS8422004AGILF_5113967.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

8422004agi www.icst.com/products/hiperclocks.html rev. b november 14, 2005 1 integrated circuit systems, inc. ics8422004i f emto c locks ? lvcmos/c rystal - to - lvhstl f requency s ynthesizer preliminary g eneral d escription the ics8422004i is a 4 output lvhstl synthesizer optimized to generate fibre channel reference clock frequencies and is a member of the hiperclocks tm family of high performance clock solutions from ics. using a 26.5625mhz 18pf parallel resonant crystal, the following frequencies can be generated based on the 2 frequency select pins (f_sel[1:0]): 212.5mhz, 187.5mhz, 159.375mhz, 156.25, 106.25mhz and 53.125mhz. the ics8422004i uses ics? 3 rd generation low phase noise vco technology and can achieve 1ps or lower typical rms phase jitter, easily meeting fibre channel jitter requirements. the ics8422004i is packaged in a small 24-pin tssop package. f eatures ? four lvhstl outputs (vohmax = 1.2v) ? selectable crystal oscillator interface or lvcmos/lvttl single-ended input ? supports the following output frequencies: 212.5mhz, 187.5mhz, 159.375mhz, 156.25, 106.25mhz, 53.125mhz ? vco range: 560mhz - 680mhz ? rms phase jitter @ 212.5mhz, using a 26.5625mhz crystal (637khz - 10mhz): 0.59ps (typical) ? power supply modes: core/output 3.3v/1.8v 2.5v/1.8v ? -40c to 85c ambient operating temperature ? available in both standard and lead-free rohs-compliant packages hiperclocks? ic s p in a ssignment 11 0 1 0 phase detector vco m = 24 (fixed) f_sel[1:0] 0 0 3 0 1 4 1 0 6 1 1 12 2 osc ics8422004i 24-lead tssop 4.40mm x 7.8mm x 0.92mm package body g package top view nq1 q1 v ddo q0 nq0 mr npll_sel nc v dda f_sel0 v dd f_sel1 1 2 3 4 5 6 7 8 9 10 11 12 nq2 q2 v ddo q3 nq3 gnd nc nxtal_sel test_clk gnd xtal_in xtal_out 24 23 22 21 20 19 18 17 16 15 14 13 b lock d iagram t u p n i y c n e u q e r f ) z h m ( s t u p n i t u p t u o y c n e u q e r f ) z h m ( 1 l e s _ f0 l e s _ f r e d i v i d m e u l a v r e d i v i d n e u l a v n / m e u l a v r e d i v i d 5 2 6 5 . 6 2004 23 8 5 . 2 1 2 5 2 6 5 . 6 2014 24 6 5 7 3 . 9 5 1 5 2 6 5 . 6 2104 26 4 5 2 . 6 0 1 5 2 6 5 . 6 2114 22 12 5 2 1 . 3 5 6 6 1 4 0 . 6 2014 24 6 5 2 . 6 5 1 5 7 3 4 . 3 2004 23 8 5 . 7 8 1 f requency s elect f unction t able f_sel[1:0] npll_sel test_clk xtal_in xtal_out nxtal_sel mr q0 nq0 q1 nq1 q2 nq2 q3 nq3 pulldown pulldown 26.5625mhz pulldown pulldown pulldown the preliminary information presented herein represents a product in prototyping or pre-production. the noted characteristics a re based on initial product characterization. integrated circuit systems, incorporated (ics) reserves the right to change any circuitry or specific ations without notice.
8422004agi www.icst.com/products/hiperclocks.html rev. b november 14, 2005 2 integrated circuit systems, inc. ics8422004i f emto c locks ? lvcmos/c rystal - to - lvhstl f requency s ynthesizer preliminary t able 1. p in d escriptions t able 2. p in c haracteristics r e b m u ne m a ne p y tn o i t p i r c s e d 2 , 11 q , 1 q nt u p t u o. s l e v e l e c a f r e t n i l t s h v l . r i a p t u p t u o l a i t n e r e f f i d 2 2 , 3v o d d r e w o p. s n i p y l p p u s t u p t u o 5 , 40 q n , 0 qt u p u o. s l e v e l e c a f r e t n i l t s h v l . r i a p t u p t u o l a i t n e r e f f i d 6r mt u p n in w o d l l u p e r a s r e d i v i d l a n r e t n i e h t , h g i h c i g o l n e h w . t e s e r r e t s a m h g i h e v i t c a x q n s t u p t u o d e t r e v n i e h t d n a w o l o g o t x q s t u p t u o e u r t e h t g n i s u a c t e s e r e r a s t u p t u o e h t d n a s r e d i v i d l a n r e t n i e h t , w o l c i g o l n e h w . h g i h o g o t . s l e v e l e c a f r e t n i l t t v l / s o m c v l . d e l b a n e 7l e s _ l l p nt u p n in w o d l l u p n e h w . s r e d i v i d e h t o t t u p n i s a k l c _ t s e t d n a l l p e h t n e e w t e b s t c e l e s k c o l c e c n e r e f e r e h t s t c e l e s e d , h g i h n e h w . ) e l b a n e l l p ( l l p s t c e l e s , w o l . s l e v e l e c a f r e t n i l t t v l / s o m c v l . ) s s a p y b l l p ( 8 1 , 8c nd e s u n u. t c e n n o c o n 9v a d d r e w o p. n i p y l p p u s g o l a n a 2 1 , 0 1 , 0 l e s _ f 1 l e s _ f t u p n in w o d l l u p. s l e v e l e c a f r e t n i l t t v l / s o m c v l . s n i p t c e l e s y c n e u q e r f 1 1v d d r e w o p. n i p y l p p u s e r o c 4 1 , 3 1 , t u o _ l a t x n i _ l a t x t u p n i , t u p t u o e h t s i t u o _ l a t x . e c a f r e t n i l a t s y r c t n a n o s e r l e l l a r a p . t u p n i e h t s i n i _ l a t x 9 1 , 5 1d n gr e w o p. d n u o r g y l p p u s r e w o p 6 1k l c _ t s e tt u p n in w o d l l u p. t u p n i k c o l c l t t v l / s o m c v l 7 1l e s _ l a t x nt u p n in w o d l l u p e c n e r e f e r l l p e h t e h t s a s t u p n i k l c _ t s e t r o l a t s y r c n e e w t e b s t c e l e s . h g i h n e h w k l c _ t s e t s t c e l e s . w o l n e h w s t u p n i l a t x s t c e l e s . e c r u o s . s l e v e l e c a f r e t n i l t t v l / s o m c v l 1 2 , 0 23 q , 3 q nt u p t u o. s l e v e l e c a f r e t n i l t s h v l . r i a p t u p t u o l a i t n e r e f f i d 4 2 , 3 22 q n , 2 qt u p t u o. s l e v e l e c a f r e t n i l t s h v l . r i a p t u p t u o l a i t n e r e f f i d : e t o n n w o d l l u p . s e u l a v l a c i p y t r o f , s c i t s i r e t c a r a h c n i p , 2 e l b a t e e s . s r o t s i s e r t u p n i l a n r e t n i o t s r e f e r l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u c n i e c n a t i c a p a c t u p n i 4f p r n w o d l l u p r o t s i s e r n w o d l l u p t u p n i 1 5k
8422004agi www.icst.com/products/hiperclocks.html rev. b november 14, 2005 3 integrated circuit systems, inc. ics8422004i f emto c locks ? lvcmos/c rystal - to - lvhstl f requency s ynthesizer preliminary a bsolute m aximum r atings supply voltage, v dd 4.6v inputs, v i -0.5v to v dd + 0.5v outputs, i o continuous current 50ma surge current 100ma package thermal impedance, ja 70c/w (0 mps) storage temperature, t stg -65c to 150c note: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stress specifications only. functional operation of product at these conditions or any conditions be- yond those listed in the dc characteristics or ac character- istics is not implied. exposure to absolute maximum rating conditions for extended periods may affect product reliability. l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h i e g a t l o v h g i h t u p n i v d d v 3 . 3 =2v d d 3 . 0 +v v d d v 5 . 2 =7 . 1v d d 3 . 0 +v v l i t u p n i e g a t l o v w o l v d d v 3 . 3 =3 . 0 -8 . 0v v d d v 5 . 2 =3 . 0 -7 . 0v i h i t u p n i t n e r r u c h g i h , r m , k l c _ t s e t , 1 l e s _ f , 0 l e s _ f l e s _ l a t x n , l e s _ l l p n v d d v = n i v 5 6 4 . 3 = v 5 . 2 r o 0 5 1a i l i t u p n i t n e r r u c w o l , r m , k l c _ t s e t , 1 l e s _ f , 0 l e s _ f l e s _ l a t x n , l e s _ l l p n v d d , v 5 . 2 r o v 5 6 4 . 3 = v n i v 0 = 0 5 1 -a t able 3a. p ower s upply dc c haracteristics , v dd = v dda = 3.3v5%, v ddo = 1.8v0.2v, t a = -40c to 85c t able 3c. lvcmos / lvttl dc c haracteristics , v dd = v dda = 3.3v5% or 2.5v5%, v ddo = 1.8v0.2v, t a = -40c to 85c t able 3b. p ower s upply dc c haracteristics , v dd = v dda = 2.5v5%, v ddo = 1.8v0.2v, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v d d e g a t l o v y l p p u s e r o c 5 7 3 . 25 . 25 2 6 . 2v v a d d e g a t l o v y l p p u s g o l a n a 5 7 3 . 25 . 25 2 6 . 2v v o d d e g a t l o v y l p p u s t u p t u o 6 . 18 . 10 . 2v i d d t n e r r u c y l p p u s r e w o p 0 8a m i a d d t n e r r u c y l p p u s g o l a n a 0 1a m i o d d t n e r r u c y l p p u s t u p t u od a o l o n0a m l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v d d e g a t l o v y l p p u s e r o c 5 3 1 . 33 . 35 6 4 . 3v v a d d e g a t l o v y l p p u s g o l a n a 5 3 1 . 33 . 35 6 4 . 3v v o d d e g a t l o v y l p p u s t u p t u o 6 . 18 . 10 . 2v i d d t n e r r u c y l p p u s r e w o p 0 9a m i a d d t n e r r u c y l p p u s g o l a n a 0 1a m i o d d t n e r r u c y l p p u s t u p t u od a o l o n0a m
8422004agi www.icst.com/products/hiperclocks.html rev. b november 14, 2005 4 integrated circuit systems, inc. ics8422004i f emto c locks ? lvcmos/c rystal - to - lvhstl f requency s ynthesizer preliminary t able 4. c rystal c haracteristics t able 3d. lvhstl dc c haracteristics , v dd = v dda = 3.3v5%, v ddo = 1.8v0.2v, t a = -40c to 85c t able 3e. lvhstl dc c haracteristics , v dd = v dda = 2.5v5%, v ddo = 1.8v0.2v, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h o 1 e t o n ; e g a t l o v h g i h t u p t u o 0 . 12 . 1v v l o 1 e t o n ; e g a t l o v w o l t u p t u o 04 . 0v v x o 2 e t o n ; e g a t l o v r e v o s s o r c t u p t u o 0 40 6% v g n i w s g n i w s e g a t l o v t u p t u o k a e p - o t - k a e p 6 . 01 . 1v 0 5 h t i w d e t a n i m r e t s t u p t u o : 1 e t o n . d n u o r g o t . n o i t i d n o c n e v i g a t a g n i w s e g a t l o v t u p t u o o t t c e p s e r h t i w d e n i f e d : 2 e t o n l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h o 1 e t o n ; e g a t l o v h g i h t u p t u o 0 . 12 . 1v v l o 1 e t o n ; e g a t l o v w o l t u p t u o 5 3 2 . 0v v x o 2 e t o n ; e g a t l o v r e v o s s o r c t u p t u o 0 40 6% v g n i w s g n i w s e g a t l o v t u p t u o k a e p - o t - k a e p 9 . 0v 0 5 h t i w d e t a n i m r e t s t u p t u o : 1 e t o n . d n u o r g o t . n o i t i d n o c n e v i g a t a g n i w s e g a t l o v t u p t u o o t t c e p s e r h t i w d e n i f e d : 2 e t o n r e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u n o i t a l l i c s o f o e d o m l a t n e m a d n u f y c n e u q e r f 3 3 . 3 25 2 6 5 . 6 23 3 . 8 2z h m ) r s e ( e c n a t s i s e r s e i r e s t n e l a v i u q e 0 5 e c n a t i c a p a c t n u h s 7f p l e v e l e v i r d 1w m . l a t s y r c t n a n o s e r l e l l a r a p f p 8 1 n a g n i s u d e z i r e t c a r a h c : e t o n
8422004agi www.icst.com/products/hiperclocks.html rev. b november 14, 2005 5 integrated circuit systems, inc. ics8422004i f emto c locks ? lvcmos/c rystal - to - lvhstl f requency s ynthesizer preliminary t able 5a. ac c haracteristics , v dd = v dda = 3.3v5%, v ddo = 1.8v0.2v, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o y c n e u q e r f t u p t u o 0 0 = ] 0 : 1 [ l e s _ f7 6 . 6 8 16 6 . 6 2 2z h m 1 0 = ] 0 : 1 [ l e s _ f0 4 10 7 1z h m 0 1 = ] 0 : 1 [ l e s _ f3 3 . 3 93 3 . 3 1 1z h m 1 1 = ] 0 : 1 [ l e s _ f7 6 . 6 46 6 . 6 5z h m t ) o ( k s3 , 1 e t o n ; w e k s t u p t u o d b ts p t ) ? ( t i j ; ) m o d n a r ( r e t t i j e s a h p s m r 2 e t o n ) z h m 0 1 - z h k 7 3 6 ( , z h m 5 . 2 1 29 5 . 0s p ) z h m 0 1 - z h k 7 3 6 ( , z h m 5 . 7 8 13 5 . 0s p ) z h m 0 1 - z h k 7 3 6 ( , z h m 5 7 3 . 9 5 16 5 . 0s p ) z h m 0 2 - z h m 5 7 8 . 1 ( , z h m 5 2 . 6 5 10 5 . 0s p ) z h m 0 2 - z h m 5 7 8 . 1 ( , z h m 5 2 . 6 0 16 5 . 0s p ) z h m 0 1 - z h k 7 3 6 ( , z h m 5 2 1 . 3 56 6 . 0s p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 1 4s p c d oe l c y c y t u d t u p t u o 0 5% . s n o i t i d n o c d a o l l a u q e h t i w d n a s e g a t l o v y l p p u s e m a s e h t t a s t u p t u o n e e w t e b w e k s s a d e n i f e d : 1 e t o n v t a d e r u s a e m o d d . 2 / . t o l p e s i o n e s a h p e h t o t r e f e r e s a e l p : 2 e t o n . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 3 e t o n t able 5b. ac c haracteristics , v dd = v dda = 2.5v5%, v ddo = 1.8v0.2v, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o y c n e u q e r f t u p t u o 0 0 = ] 0 : 1 [ l e s _ f7 6 . 6 8 16 6 . 6 2 2z h m 1 0 = ] 0 : 1 [ l e s _ f0 4 10 7 1z h m 0 1 = ] 0 : 1 [ l e s _ f3 3 . 3 93 3 . 3 1 1z h m 1 1 = ] 0 : 1 [ l e s _ f7 6 . 6 46 6 . 6 5z h m t ) o ( k s3 , 1 e t o n ; w e k s t u p t u o d b ts p t ) ? ( t i j ; ) m o d n a r ( r e t t i j e s a h p s m r 2 e t o n ) z h m 0 1 - z h k 7 3 6 ( , z h m 5 . 2 1 20 6 . 0s p ) z h m 0 1 - z h k 7 3 6 ( , z h m 5 . 7 8 12 7 . 0s p ) z h m 0 1 - z h k 7 3 6 ( , z h m 5 7 3 . 9 5 14 6 . 0s p ) z h m 0 2 - z h m 5 7 8 . 1 ( , z h m 5 2 . 6 5 10 5 . 0s p ) z h m 0 2 - z h m 5 7 8 . 1 ( , z h m 5 2 . 6 0 15 5 . 0s p ) z h m 0 1 - z h k 7 3 6 ( , z h m 5 2 1 . 3 58 6 . 0s p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 8 3s p c d oe l c y c y t u d t u p t u o 0 5% . s n o i t i d n o c d a o l l a u q e h t i w d n a s e g a t l o v y l p p u s e m a s e h t t a s t u p t u o n e e w t e b w e k s s a d e n i f e d : 1 e t o n v t a d e r u s a e m o d d . 2 / . t o l p e s i o n e s a h p e h t o t r e f e r e s a e l p : 2 e t o n . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 3 e t o n
8422004agi www.icst.com/products/hiperclocks.html rev. b november 14, 2005 6 integrated circuit systems, inc. ics8422004i f emto c locks ? lvcmos/c rystal - to - lvhstl f requency s ynthesizer preliminary t ypical p hase n oise at 212.5mh z 212.5mhz rms phase jitter (random) 637khz to 10mhz = 0.59ps (typical) o ffset f requency (h z ) 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 100 1k 10k 100k 1m 10m 100m ? ? ? dbc hz n oise p ower fibre channel jitter filter raw phase noise data phase noise result by adding fibre channel filter to raw data
8422004agi www.icst.com/products/hiperclocks.html rev. b november 14, 2005 7 integrated circuit systems, inc. ics8422004i f emto c locks ? lvcmos/c rystal - to - lvhstl f requency s ynthesizer preliminary p arameter m easurement i nformation t pw t period t pw t period odc = x 100% q0, q1 o utput s kew lvhstl 2.5v/1.8v o utput l oad ac t est c ircuit lvhstl 3.3v/1.8v o utput l oad ac t est c ircuit o utput r ise /f all t ime clock outputs 20% 80% 80% 20% t r t f v sw i n g nq0, nq1 phase noise mas k offset frequency f 1 f 2 phase noise plot rms jitter = area under the masked phase noise plot noise power scope lvhstl qx nqx v dd, v dda v ddo 0v 3.3v5% gnd scope lvhstl qx nqx 0v 2.5v5% gnd v dd, v dda v ddo t sk(o) qy qx nqy nqx rms p hase j itter o utput d uty c ycle /p ulse w idth /p eriod 1.8v0.2v 1.8v0.2v
8422004agi www.icst.com/products/hiperclocks.html rev. b november 14, 2005 8 integrated circuit systems, inc. ics8422004i f emto c locks ? lvcmos/c rystal - to - lvhstl f requency s ynthesizer preliminary a pplication i nformation as in any high speed analog circuitry, the power supply pins are vulnerable to random noise. the ics8422004i provides separate power supplies to isolate any high switching noise from the outputs to the internal pll. v dd , v dda , and v ddo should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. to achieve optimum jitter performance, power supply isolation is required. figure 1 illustrates how a 10 resistor along with a 10f and a .01 f bypass capacitor should be connected to each v dda . p ower s upply f iltering t echniques f igure 1. p ower s upply f iltering 10 v dda 10 f .01 f 3.3v or 2.5v .01 f v dd c rystal i nput i nterface the ics8422004i has been characterized with 18pf parallel resonant crystals. the capacitor values shown in figure 2 figure 2. c rystal i npu t i nterface below were determined using a 26.5625mhz 18pf parallel resonant crystal and were chosen to minimize the ppm error. ics8422004i c1 22p x1 18pf parallel crystal c2 22p xtal_out xtal_in i nputs : c rystal i nput : for applications not requiring the use of the crystal oscillator input, both xtal_in and xtal_out can be left floating. though not required, but for additional protection, a 1k resistor can be tied from xtal_in to ground. test_clk i nput : for applications not requiring the use of the test clock, it can be left floating. though not required, but for additional protection, a 1k resistor can be tied from the test_clk to ground. r ecommendations for u nused i nput and o utput p ins lvcmos c ontrol p ins : all control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. a 1k resistor can be used. o utputs : lvhstl o utput all unused lvhstl outputs can be left floating. we recommend that there is no trace attached. both sides of the differential output pair should either be left floating or terminated.
8422004agi www.icst.com/products/hiperclocks.html rev. b november 14, 2005 9 integrated circuit systems, inc. ics8422004i f emto c locks ? lvcmos/c rystal - to - lvhstl f requency s ynthesizer preliminary p ower c onsiderations this section provides information on power dissipation and junction temperature for the ics8422004i. equations and example calculations are also provided. 1. power dissipation. the total power dissipation for the ics8422004i is the sum of the core power plus the power dissipated in the load(s). the following is the power dissipation for v dd = 3.3v + 5% = 3.465v, which gives worst case results. note: please refer to section 3 for details on calculating power dissipated in the load. ? power (core) max = v dd_max * i dd_max = 3.465v * 100ma = 346.5mw ? power (outputs) max = 32.8mw/loaded output pair if all outputs are loaded, the total power is 4 * 32.8mw = 131.2mw total power _max (3.465v, with all outputs switching) = 346.5mw + 131.2mw = 477.7mw 2. junction temperature. junction temperature, tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. the maximum recommended junction temperature for hiperclocks tm devices is 125c. the equation for tj is as follows: tj = ja * pd_total + t a tj = junction temperature ja = junction-to-ambient thermal resistance pd_total = total device power dissipation (example calculation is in section 1 above) t a = ambient temperature in order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance ja must be used. assuming a moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 65c/w per table 6 below. therefore, tj for an ambient temperature of 85c with all outputs switching is: 85c + 0.478w * 65c/w = 99.85c. this is well below the limit of 125c. this calculation is only an example. tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow , and the type of board (single layer or multi-layer). t able 6. t hermal r esistance ja for 24- pin tssop, f orced c onvection ja by velocity (meters per second) 0 1 2.5 multi-layer pcb, jedec standard test boards 70c/w 65c/w 62c/w
8422004agi www.icst.com/products/hiperclocks.html rev. b november 14, 2005 10 integrated circuit systems, inc. ics8422004i f emto c locks ? lvcmos/c rystal - to - lvhstl f requency s ynthesizer preliminary 3. calculations and equations. the purpose of this section is to derive the power dissipated into the load. hstl output driver circuit and termination are shown in figure 3. t o calculate worst case power dissipation into the load, use the following equations which assume a 50 load. pd_h is power dissipation when the output drives high. pd_l is the power dissipation when the output drives low. pd_h = (v oh_min /r l ) * (v dd_max - v oh_min ) pd_l = (v ol_max /r l ) * (v dd_max - v ol_max ) pd_h = (1v/50 ) * (2v - 1v) = 20mw pd_l = (0.4v/50 ) * (2v - 0.4v) = 12.8mw total power dissipation per output pair = pd_h + pd_l = 32.8mw f igure 3. hstl d river c ircuit and t ermination v ddo v out rl 50 q1
8422004agi www.icst.com/products/hiperclocks.html rev. b november 14, 2005 11 integrated circuit systems, inc. ics8422004i f emto c locks ? lvcmos/c rystal - to - lvhstl f requency s ynthesizer preliminary r eliability i nformation t ransistor c ount the transistor count for ics8422004i is: 2951 t able 7. ja vs . a ir f low t able for 24 l ead tssop ja by velocity (meters per second) 0 1 2.5 multi-layer pcb, jedec standard test boards 70c/w 65c/w 62c/w
8422004agi www.icst.com/products/hiperclocks.html rev. b november 14, 2005 12 integrated circuit systems, inc. ics8422004i f emto c locks ? lvcmos/c rystal - to - lvhstl f requency s ynthesizer preliminary p ackage o utline - g s uffix for 24 l ead tssop t able 8. p ackage d imensions reference document: jedec publication 95, mo-153 l o b m y s s r e t e m i l l i m m u m i n i mm u m i x a m n4 2 a- -0 2 . 1 1 a5 0 . 05 1 . 0 2 a0 8 . 05 0 . 1 b9 1 . 00 3 . 0 c9 0 . 00 2 . 0 d0 7 . 70 9 . 7 ec i s a b 0 4 . 6 1 e0 3 . 40 5 . 4 ec i s a b 5 6 . 0 l5 4 . 05 7 . 0 0 8 a a a- -0 1 . 0
8422004agi www.icst.com/products/hiperclocks.html rev. b november 14, 2005 13 integrated circuit systems, inc. ics8422004i f emto c locks ? lvcmos/c rystal - to - lvhstl f requency s ynthesizer preliminary t able 9. o rdering i nformation while the information presented herein has been checked for both accuracy and reliability, integrated circuit systems, incorpor ated (ics) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patent s, or licenses are implied. this product is intended for use in normal commercial and industrial applications. any other applications such as those requiring high reliability or other extr aordinary environmental requirements are not recommended without additional processing by ics. ics reserves the right to change any circuitry or specifications without noti ce. ics does not authorize or warrant any ics product for use in life support devices or critical medical instruments. the aforementioned trademark, hiperclocks and f emto c locks are trademarks of integrated circuit systems, inc. or its subsidiaries in the united states and/or other countries. r e b m u n r e d r o / t r a pg n i k r a me g a k c a pg n i g a k c a p g n i p p i h se r u t a r e p m e t i g a 4 0 0 2 2 4 8 s c ii g a 4 0 0 2 2 4 8 s c ip o s s t d a e l 0 2e b u tc 5 8 o t c 0 4 - t i g a 4 0 0 2 2 4 8 s c ii g a 4 0 0 2 2 4 8 s c ip o s s t d a e l 0 2l e e r & e p a t 0 0 5 2c 5 8 o t c 0 4 - f l i g a 4 0 0 2 2 4 8 s c id b tp o s s t " e e r f - d a e l " d a e l 0 2e b u tc 5 8 o t c 0 4 - t f l i g a 4 0 0 2 2 4 8 s c id b tp o s s t " e e r f - d a e l " d a e l 0 2l e e r & e p a t 0 0 5 2c 5 8 o t c 0 4 - . t n a i l p m o c s h o r e r a d n a n o i t a r u g i f n o c e e r f - b p e h t e r a r e b m u n t r a p e h t o t x i f f u s " f l " n a h t i w d e r e d r o e r a t a h t s t r a p : e t o n

▲Up To Search▲

Price & Availability of ICS8422004AGILF

	To Download ICS8422004AGILF Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .